Detectors that, in order to detect individual photons, generate an electrical time-continuous detected signal that comprises one detection pulse for each detected photon, are known. The duration of such detection pulses is very short, often shorter than a nanosecond.
In order to identify the number of photons sensed by the detector in a specific time interval, it is consequently desirable to make available counting devices that are capable of counting such short detection pulses in error-free fashion. The counting devices used are as a rule digital modules such as, for example, a field-programmable gate array (FPGA) for which a maximum working cycle time is provided that constitutes an upper limit on the working speed of the module. This maximum working cycle time of an FPGA of this kind depends, for example, on the bandwidth of the FPGA's internal network for distributing the clock, on the signal transit times of the individual logic elements, on the signal delays that occur in the connecting leads between the logic elements, and on the complexity of the arrangement of those elements. The variables recited above are typical for the particular module used, and also depend, for example, on the manufacturing process with which the module is produced.
With a digital module of this kind it is generally not possible to count detection pulses whose pulse width is approximately equal to or smaller than the clock cycle predefined by the maximum working cycle time.